This invention relates to computer systems with interrupt controllers and more particularly to more efficient systems that are conditioned to convert and respond to interrupt-related software commands that are normally incompatible with the system.
Systems of this nature have been described heretofore, such as the IBM Personal Computers XT and AT*, (*Personal Computer XT is a trademark and Personal Computer AT is a registered trademark of International Business Machines Corporation) which have one or more programmable interrupt controllers interconnected in the system which handle the interrupts in the system and thereby relieve the Central Processor Unit (CPU) from software and processing overhead. A representative interrupt controller of this nature is the Intel* 8259A Programmable Interrupt Controller (PIC) which handles up to eight vectored priority interrupts for the CPU. (*Intel is a registered trademark of Intel Corporation). The 8259A features are described for example, in the Intel "Microsystem Components Handbook", 1984, Pp 2-120 to 2-137. The 8259A PIC can be programmed by software commands to respond to edge or level triggered interrupt modes. It is desirable with certain computer systems to operate primarily with software that uses only interrupt-related software commands in one mode but to be responsive to interrupt-related software commands from other system configurations or programs that are based on a different mode.